Nov 21, 2024  
2024-2025 Cal State East Bay Catalog 
    
2024-2025 Cal State East Bay Catalog
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CMPE 480 - VLSI Circuit Design/Layout


Units: 4
Fundamental design techniques for VLSI circuits. Properties of silicon, polysilicon, metal, n-type, and p-type materials. NMOS and PMOS transistor sizing and delay for logic functions. Implementation of complex integrated circuits on a microchip. Use of computer aided design tools.

Prerequisites: CHEM 110, CMPE 323, and ENGR 230.
Possible Instructional Methods: On-ground.
Grading: A-F grading only.
Course Typically Offered: Spring ONLY


Student Learning Outcomes - Upon successful completion of this course students will be able to:
  1. Understand NMOS and PMOS transistor operation and layout;
  2. Understand properties of silicon, polysilicon, metal, n-type and p-type materials for transistor layout designs;
  3. Create layouts of simple logic gates, combinational circuits, sequential circuit elements, and major CPU architecture components;
  4. Understand timing and delay properties digital circuit components, with respect to transistor sizing and layout;
  5. Understand design rules for transistor layout.




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